As engineers pursue high-speed serial-bus, backplane, memory-interface, and network designs, they face significant challenges relating to a variety of interfaces and standards, including USB 3.1, Thunderbolt 3, DisplayPort, HDMI, PCIe, DDR4/DDR5, InfiniBand, RapidIO, JESD204B, SAS, and OIF-CEI-56G as well as Ethernet speeds to 400G. To meet the challenges, designers will have to master topics including jitter and signal integrity, power integrity, modulation schemes such as PAM-4, data analytics, and fixturing and de-embedding.
Nicole Faubert, market industry manager, Internet infrastructure at Keysight Technologies, highlighted the challenges using USB 3.1 Type-C as an example. “The slim, flippable connector enables USB to achieve newly defined USB 3.1 data rates of 10 Gb/s, with 40 Gb/s within reach for two-lane operation, which adds to the attractiveness of using the high-performance Type-C connector,” she said. “Handsets and devices including tablets, laptops, and mobile phones will take full advantage of the smaller low-profile and reversible connector. The combined capability, power improvements, and ease of use result in a complex system for design and test engineers.”
DesignCon 2017, scheduled for Jan. 31-Feb. 2 in Santa Clara, will provide a venue for discussing the challenges and learning about the tools available to help meet them. Faubert said Keysight will continue its tradition of serving as the DesignCon Host Sponsor. “In addition to our large booth (#725), we will also host a series of workshop sessions at the Keysight Education Forum,” she said. “Keysight will feature eight unique 40-minute education forum workshop sessions led by Keysight industry experts. Topics include USB Type-C, signal and power integrity, 400G/PAM-4, PCIe4, DDR4/LPDDR4, data analytics, and IBIS-AMI simulation basics.”
Focus on USB 3.1 Type-C
Faubert added that booth demonstrations will complement the education workshop series. One focus of these demonstrations will be USB 3.1/Type-C Tx/Rx/PD test. “The USB Type-C ecosystem includes technologies such as USB 3.1 Gen 2, USB-PD, MHL, Thunderbolt 3, DisplayPort, and HDMI Alt Mode,” she said. “As the USB Type-C ecosystem moves into the mainstream with worldwide adoption, there are significant learnings from early silicon and system implementations. We will demonstrate our latest USB/Type-C transmitter and receiver test solutions to properly characterize and validate USB designs as well as our cable/connector test solution using our network analyzer with the TDR option.”
Keysight products targeting USB Type-C include the N7015A Type-C high-speed test fixture for precompliance test; the N7016A low-speed signal access and control fixture, which manages power and control lines from the N7015A (Figure 1); the M8020A J-BERT high-performance BERT; a cable/connector compliance test system consisting of an ENA mainframe (E5071C) with the enhanced time-domain analysis option (E5071C-TDR); and an N4433A ECal module with automated USB cable and connector test software.
Keysight also offers software for its Infiniium Series oscilloscopes, including the N8837A USB-PD protocol trigger and decode software, the N8821A USB 3.1 Gen1/Gen2 protocol trigger and decode software, and the U7243B USB 3.1 compliance test software.
Other Keysight booth demonstrations at DesignCon will focus on PCIe Rx/Tx test, signal integrity and power integrity, 400G/PAM-4 test, data analytics, DDR4/DDR5 memory test and validation, flexible multilevel signal generation, and Keysight services and support solutions including technology refresh, training, and calibration.
Hiroshi Goto, digital/optics business development manager, Anritsu, said the Signal Quality Analyzer MP1800A BERT (Figure 2) will be part of many high-speed signal-integrity solutions that Anritsu will demonstrate at DesignCon 2017. “Headlining the test portfolio is a 56G/112 NRZ and PAM-4 accurate jitter tolerance test system, featuring the MP1800A with the G0374A 64-Gbaud PAM-4 DAC and the MP1825B four-tap emphasis that satisfies the high accuracy and margin requirements of communications standards such as OIF, IEEE, and InfiniBand,” he said.
“For high-speed serial bus verification, the MP1800A will be integrated with the MP1825B and MG3710A vector signal generator to conduct jitter tolerance tests on PCIe and 100GE interfaces,” he added. “The MP1800A will also be configured with the ShockLine Economy vector network analyzer (VNA) MS46322A along with the Granite River Labs calibration and receiver test software to create an automated, simple, and efficient method to test Thunderbolt 3 Receiver CTS (compliance test specification).”
In addition, the company will demonstrate the MP1800A integrated with the new G0373A USB 3.1 receiver test adapter and dedicated high-speed serial data test software to support SuperSpeed USB 3.1 Gen 2 10-Gb/s receiver test.
“Also on display in the Anritsu booth at DesignCon 2017 will be its VectorStar VNAs in multiple configurations,” Goto said. “One station will include a 70-GHz four-port signal integrity solution, and another will be a four-port 70-kHz to 110-GHz broadband VNA solution for on-wafer device characterization.”
Teledyne LeCroy at DesignCon plans to highlight memory test, showing debug and compliance test solutions with its oscilloscopes, the HDA125 high-speed digital analyzer, and Voyager protocol analyzers, according to product managers Robert Mart and Roy Chestnut.
The HDA125 converts a Teledyne LeCroy digital oscilloscope into a mixed-signal debug and validation tool. Mart elaborated on the HDA125’s unique capabilities. “Teledyne LeCroy already offers the industry’s only dedicated DDR debug toolkit, designed to simplify challenging memory interface validation,” he said. “Adding the HDA125 … allows the DDR command bus to be directly acquired and integrated into the analysis, enabling advanced command triggering and sophisticated, searchable bus state viewing. While most other memory interface test solutions slant toward compliance, Teledyne LeCroy offers a dedicated debug package for DDR as well as its QualiPHY compliance packages.”
In addition, Mart and Chestnut said, “We will demonstrate our test solutions for the emerging USB Power Delivery (PD) standard, USB Type-C connectors, and the USB 3.1 Gen 2 protocol. The three comprise the USB-IF’s answer to Apple’s Lightning interface.” For USB, the company offers the Voyager M310C USB 3.1 test platform (Figure 3) and the USB Type-C Compliance Suite. “Our comprehensive USB 3.1 Test Suite covers transmitter, receiver, protocol, and cable/connector compliance, characterization, and debug,” they said. “Every aspect of a USB 3.1 channel is covered completely at all stages of the design, development, and debug cycles.”
Finally, they said, “We will also be demonstrating our transmitter test and characterization solutions for the next generation of 56-Gb/s NRZ and PAM-4 based communications links, such as OIF CEI-56G, using the modular high-bandwidth …10 Zi-A oscilloscope platform.”
National Instruments will be emphasizing the applicability of FPGA-based instruments to high-speed digital test. Chris Nunn, product manager, modular instruments, said, “NI will highlight the newest addition to our high-speed serial instruments, the PXIe-7902. This instrument features 24 high-speed serial channels up to 12.5 Gb/s and has a Xilinx Virtex-7 FPGA programmable in LabVIEW, VHDL, and Verilog. With the power of an open, user-programmable FPGA, these cards offer the flexibility of testing both standard and custom serial interfaces. These cards excel at protocol-aware test and lightweight characterization where price and fast measurement times are key concerns. Due to the DSP-intensive Virtex-7 485T, it also makes a great FPGA coprocessing unit.”
He added, “We aim to target solutions that require data analysis or customization that benefits from FPGAs.” NI looks to support standards such as Xilinx Aurora, JESD204B, Serial RapidIO, and 10GbE as well as custom protocols.
“We offer an off-the-shelf test solution that allows customers to bring in their own IP for high-speed serial protocols,” Nunn said. “As part of the PXI platform, our high-speed serial instruments benefit from clocking, triggering, and high-speed data movement capabilities, including streaming to and from disk as well as peer-to-peer streaming, at rates up to 3.2 GB/s. The power to integrate custom IP combined with the data analysis IP blocks and abstraction provided by LabVIEW FPGA make our users more efficient in accomplishing their goals.”
Michael Keane, product marketing engineer for test systems at NI, said, “We’ll also be showcasing the newest VirtualBench offering, the VB-8054. The VirtualBench features a software-based approach for instrumentation that provides an intuitive user experience combined with the convenience of an all-in-one device, including a mixed-signal oscilloscope, a function generator, a digital multimeter, a programmable DC power supply, and digital I/O.
Because VirtualBench interacts with modern multicore processors and multitouch displays, users can easily leverage the unified view of all five instruments to maximize their productivity. With 500 MHz of bandwidth and a sampling rate of 2 GHz/ch, the new version of VirtualBench offers increased functionality for engineers characterizing and debugging new designs or automated test systems.”
400G PAM-4 analysis
Tektronix plans to highlight a variety of test solutions at DesignCon. Joe Allen, datacenter storage solutions lead, cited as an example 400G PAM-4 analysis and debug solutions using equivalent- and real-time oscilloscopes.
The equivalent-time solution, he said, provides comprehensive jitter, noise, and BER analysis of all three eyes generated by PAM-4 signaling. It makes transmitter symbol characteristic measurements and receiver-centric eye measurements, and it supports IEEE and OIF-CEI requirements for aligning receiver sampling phases to the middle eye.
The real-time solution provides error detection on PAM-4 signals and supports noise analysis per OIF-CEI contribution. Features include interactive eye diagrams, automatic skew alignment (used in case eyes are not centered within the unit interval, as determined by clock recovery), and an expanded SCPI command set for remote control.
In addition, Tektronix will highlight several solutions for PCIe test and demonstrate a 100G Link Training Tool (Figure 4) for debugging datacenter technologies on DPO70000SX real-time oscilloscopes. This new option, along with expanded measurement support for 100G electrical debug and validation, addresses critical needs in the growing datacenter market.
Several companies will make use of DesignCon to highlight connectivity. Molex, for example, said it will showcase versatile, high-density, space-saving connectivity solutions that can help implement the rapidly increasing network bandwidth that is the crux of next-generation system architectures.
“Advancements in Molex technologies provide clear paths to adoption of higher data transmission rates that are in demand by manufacturers today,” said a spokesperson.
“Delivering superior signal integrity and density, the Molex Impulse and Impel Plus backplane connector and cable assembly systems allow users to migrate to higher data rates without an architecture redesign or extensive hardware replacement.”
At the show, Molex will highlight the company’s SpeedEdge and SpeedStack mezzanine connector systems, representing the next evolution in high-density signal, low-profile board-to-board connectivity. The edge card delivers flexible pin-counts while the mezzanine connectors promote optimal airflow and system cooling in space-constrained PCB designs.
Molex also will highlight error-free 56G NRZ and 56G PAM-4 live serial traffic using a Molex form-factor cable and backplane assembly to drive 56G speeds. An outside vendor will assist by conducting two demonstrations. For the first, the vendor will supply transmitting and receiving electronics, showing error-free 56G NRZ and 56G PAM-4 live serial traffic on the zQSFP+ form factor using a high-speed copper cable. The second demonstration will highlight the Molex Impel backplane cable assembly driving 56G speeds in both NRZ and PAM-4 applications.
And during the DesignCon 2017 conference track, Molex senior electrical engineer Yongfeng (David) Feng will present a paper titled “Fixture Modeling and De-Embedding for Cable Assembly Production Test,” exploring the relationship of design fixtures in production testing, setting calibration references, and modeling/de-embedding fixtures to get accurate measurements of devices under test.
And finally, TE Connectivity will exhibit its micro Quad Small Form-Factor Pluggable (microQSFP) connectors, which provide a higher density solution for next-generation pluggable connectivity. The company said that with higher bandwidth requirements, demand is increasing for smaller form factors that will offer greater faceplate density and higher port count. These products need to maintain superior thermal performance to keep energy costs low and maximize reliability. The technological innovations of the microQSFP form factor, the company said, have the potential to revolutionize the development of pluggable interconnect for next-generation designs.
TE said it also will showcase its Sliver internal-cabled interconnect connectors and cable assemblies, which provide low insertion loss and improved signal performance over standard PCB traces. Sliver interconnects support a choice of protocols up to 32 Gb/s per channel, including SAS (6 to 24 Gb/s), PCI Express (8 to 16 GT/s), Ethernet (10 to 25 Gb/s), and Infiniband (28 Gb/s).
As this article goes to press, other prospective DesignCon exhibitors haven’t provided details on what they intend to highlight. But based on recent product introductions, you can expect to see a range of general-purpose as well as standard-specific tools.
In the former category, for example, in November Rigol Technologies announced an expansion of its waveform generator portfolio with the introduction of the DG1022Z arbitrary waveform generator (Figure 5). The company said the new $359 instrument gives makers, educators, and IoT designers working with both low-frequency and RF applications the capability to build long complex arbitrary waves, generate 8th order harmonics, create advanced modulations, and inject random noise. It operates to 25 MHz.
And in the latter category, in September Rohde & Schwarz expanded the functionality of its R&S RTE and R&S RTO digital oscilloscopes to include a triggering and decoding option for the new clock extension peripheral interface (CXPI) protocol. CXPI is a newly developed automotive bus that serves as a cost-effective alternative to the LIN protocol. Visit EE-Evaluation Engineering Online for more information as DesignCon approaches.
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