XJTAG unveils integrated XJFlash feature

July 15, 2014. XJTAG has unveiled an integrated XJFlash feature that allows engineers to automatically generate customized programming solutions that can overcome the speed limitations generally associated with using boundary scan to program flash memories connected to FPGAs.

By creating custom programming designs for each flash/FPGA combination, XJFlash relieves the JTAG chain of unnecessary traffic (usually generated by repetitive functions such as shifting in control, address, and data bits). By doing so, programming speeds close to the device’s theoretical maximum can be achieved.

Previously only available as a consultancy service, the XJFlash module supports a range of flash and FGPA configurations, and it can now be used as part of an XJDeveloper boundary-scan test project by the end user to create a programming solution. The integration comes alongside XJTAG’s recent release of version 3.2 of its test development system.

The innovative approach of the XJFlash module allows it to erase, program, and verify any flash memory provided there is access to it from an FPGA on the target board, all within the XJTAG software.

“Complex boards often contain many devices that could benefit from faster flash programming. XJTAG can dramatically shorten this process,” said Simon Payne, CEO XJTAG. “The integration of XJFlash with our core software means that engineers can do away with separate tools and work through one powerful system.”

These recent developments further consolidate the XJTAG product range and support the company’s vision of fast, easy test and debug. New features within the version 3.2 release include the ability to test without netlists and add non-JTAG devices to projects, as well as an XJEase debugger.


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