March 9, 2014. Rudolph Technologies Inc. announced the sale of its first NSX 320 TSV Metrology System to CEA-Leti, a leading research organization based in Grenoble, France, which, in the frame of the Nanoelec Research Technology Institute (Nanoelec RTI) program, is developing 3-D integrated circuit (3DIC) technologies that use through silicon vias (TSVs) to conduct signals among vertically-stacked chips. The new NSX 320 TSV system includes integrated 3D metrology that enables specialized measurements critical to the TSV process.
“Controlling the processes used to create TSVs requires a number of specialized measurements, such as the total thickness variation (TTV) of the wafer bonded to the carrier, or the remaining silicon thickness after thinning,” said Séverine Cheramy, CEA-Leti’s director of 3-D integration development in the Nanoelec RTI program. “The NSX system’s 3D metrology capabilities, which combine accurate 2-D measurements with the ability to see and measure front, back and internal interface surfaces, will provide critical information for our TSV development program.”
Matt Wilson, Rudolph’s NSX Series product manager added, “Three-dimensional integration using TSVs is widely expected to be a key technology enabling our industry to maintain the incredible pace of development and innovation first described as Moore’s Law nearly 50 years ago. Ultimately we see the potential for rapid growth in this segment and are pleased to be part of the pioneering efforts of a leading research organization like CEA-Leti.”
Rudolph’s NSX TSV metrology systems combine the NSX family’s well-established 2-D inspection capabilities with an advanced 3D metrology that was developed at recently acquired Tamar Technology. Together, they allow the NSX metrology system to perform a wide variety of measurements needed to characterize and control TSV processes, including TSV depth measurements, bottom CD measurements, pre- and post-thinning remaining silicon thickness measurements during the reveal process, copper nail height measurements, edge trim monitoring, adhesive TTV of bonded pairs and product wafers, and traditional defect inspection throughout the entire process.