Imec Technology Forum US to Address Cost and Complexity

June 24, 2013. The relationship between IC technology and system cost and complexity will be an underlying theme of the Imec Technology Forum US, which will be held Monday afternoon, July 8, in San Francisco in conjunction with SEMICON West. To help them address emerging challenges, attendees will learn about the benefits of collaboration as presenters discuss topics such as logic scaling, emerging memory technologies, patterning costs, and next-generation lithography.

Karen Savala, president of SEMI Americas, will deliver opening remarks. She will be followed by Luc Van den hove, imec president and CEO, who will deliver a talk titled “The Sum of Minds,” in which he will discuss how innovations in areas such as life sciences, communications, and displays can help make the world a better, more sustainable place. He will explain that to solve emerging problems, we need to converge disciplines and technologies: “Our planet needs a sum of minds with which we endeavor to shift the boundaries to develop technologies that can lead to new sustainable applications.” Nanoelectronics, he will explain, will be the core of future innovations, and technologists will need to look beyond the traditional way of scaling.

Next, Martin Anstice, president and CEO of Lam Research, will offer a presentation titled “Inflection challenges and the value creation opportunities from collaboration.” He will provide an overview of the latest technical and economic challenges for semiconductor manufacturing at the sub-10 nm node, along with an update on the planned 450 mm transition.

Additional presentations will delve into the technical details. These presentations include

  • “Logic scaling beyond 10nm, a power-performance-area-cost-trade-off,” by An Steegen, senior vice president, process technology, imec;
  • “Emerging memory technologies for a continued decrease of the storage cost per bit, by Jan Van Houdt, director, flash memory, and program-manager, memory device design group, imec; and
  • “Mastering the patterning costs for future technology nodes,” by Kurt Ronse, director, advanced patterning department, imec.

In addition, Paul Marchal, director of technical marketing at imec, will present a talk titled “Design complexity in future technologies.” He will discuss risks and costs as technology proceeds from node to node. He will illustrate several technology and design trade-offs, such as patterning, layout-dependent effects, 3-D integration, ESD susceptibility, and reliability. He will also discuss major technology disruptions on the horizon, including MRAM, low-power devices, and silicon photonics.

Martin van den Brink, president and CTO of ASML, will conclude the forum with a presentation titled “Continuing to shrink: next-generation lithography—progress and prospects” He will provide a concise overview over the status and roadmap of the key lithographic technologies required for continued semiconductor scaling. He will highlight progress in extending ArF immersion lithography to enable multiple patterning, and he will report on the status of ASML’s Extreme Ultraviolet (EUV) lithography program. Finally, he will elaborate how both technologies will be accelerated by a suite of “Holistic Lithography” applications.

Visit imec for more information and to register.

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