ASSET and Synopsys collaborate on IEEE P1687 IJTAG

May 26, 2014. ASSET InterTech has announced it has collaborated with Synopsys on a proof-of-concept case study demonstrating the viability of an IJTAG tools ecosystem. Tools are needed to insert and synthesize IEEE P1687 IJTAG embedded instruments into chips and then access those instruments to operate them for circuit board test purposes.

“Now that the IEEE P1687 IJTAG embedded instrumentation standard has passed ballot, it's time for the various semiconductor test and board test tool vendors who make up the IJTAG ecosystem to start showing chip, board, and system design engineers how to deploy this exciting new technology,” said John Potter, senior principal technologist for ASSET and one of three authors of the case study. “Our case study demonstrates how Synopsys DFTMAX and TetraMAX and ASSET's ScanWorks can support the in-situ defect diagnosis in a product life cycle, beginning with chip test and verification, through board-level manufacturing test and diagnostics, and even field service applications.”

“ASSET verifies interoperability between their products and Synopsys DFTMAX to ensure seamless boundary-scan test,” said Robert Ruiz, senior marketing manager for test products at Synopsys. “For network designs, we jointly pioneered the first successful iJTAG production flow to provide powerful in-system diagnostics.” (See http://www.atpg.com.)*

An eBook describing the collaboration and titled “IEEE P1687 IJTAG Tools Ecosystem: A Case Study” can be downloaded here.

*Updated May 29.

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