Search Results For Articles Referencing:

" ATE "

Reducing Defect Rates With Cell-Aware Testing

  By Friedrich Hapke, Mentor Graphics, and Michael Reese and Jason Rivers, Advanced Micro Devices , June 2012

Addressing New Requirements for Legacy Test Stations

  By Peter Hansen, Teradyne, Assembly Test Division, June 2012

Switching and ATE: Inseparable

  By Tom Lecklider, Senior Technical Editor, May 2012

Protocol-Aware ATE Digital Instruments

  By John Aslanian, Teradyne, May 2012

Advantest Completes Integration of Verigy

  By Rick Nelson, Executive Editor, April 2012

Week in Brief: Lightning Test, Licensing, Blades, More…

  By Rick Nelson, Executive Editor, March 2012

AR Introduces Multi-Tone RF Test System

  By Rick Nelson, Executive Editor, March 2012

49.99 Years of DMM Coverage

  By Tom Lecklider, Senior Technical Editor, April 2012

Semiconductor ATE targets ASSPs

  By Rick Nelson, Executive Editor, March 2012

Enabling Flexible RF/Microwave Measurements

  By Rick Nelson, Executive Editor, April 2012

EE Celebrates 50

  By Rick Nelson, Executive Editor, April 2012

EE Celebrates 45th Anniversary

  By Deborah Beebe, Managing Editor, March 2007

March EE highlights mil/aero ATE, LTE, smart power, more

  By Rick Nelson, Executive Editor, March 2012

Upgrade or Replace: The MIL/Aero ATE Dilemma

  By Tom Lecklider, Senior Technical Editor, March 2012

Boosting Semiconductor Yield and ROI

  By Rick Nelson, Executive Editor, March 2012

High-Speed ATE - The Future of High-Speed ATE

  By Clemens Leichtle, Ph.D., Agilent Technologies, November 2004

IC ATE - Improving the Structural Stability Of Probe Cards

  By Krzysztof Dabrowiecki, Probe 2000, October 2004

The Challenges of Memory Mix Test

  By Sam Wong, Agilent Technologies, August 2004

ATE for SOC Multisite Testing

  By Randy Kramer, Teradyne, July 2004

Testing Consumer Audio and Video SOCs

  By Jeff Brenner and Gordon J. DeWitte, Agilent Technologies, June 2004

Life Testing and Reliability Predictions for Electromechanical Relays

  By Phil Roettjer, Relay Testing Services, June 2004

The Achilles Heel of Modern Electronics

  By Brent Sorensen, Universal Synaptics, June 2004

Product Focus - Accurate Test Without ATE-Generated Vectors

  By Tom Lecklider, Senior Technical Editor, June 2004

Manufacturability With Embedded Infrastructure IPs

  By Yervant Zorian, Ph.D., and Mouli Chandramouli, Ph.D., Virage Logic, May 2004

Get On-Board ATE Test Fixtures

  By Tom Lecklider, Senior Technical Editor, March 2004

PCB Testing Goes Socketless

  By Matt Parker and Jeff Smith, QA Technology, July 2004

Selecting One or More From N

  By Tom Lecklider, Senior Technical Editor, November 2004

Jitter Testing - A High-Throughput Jitter Analysis Test Strategy

  By Tammy L. McClure, GuideTech and Stephen L. Spencer, Texas Instruments, December 2004

Seven Products Win Honors From EE Readers

  By Evaluation Engineering, January 2005

The Pitfalls of Replacing Obsolete Instrumentation

  By Chris Gorringe, EADS Test and Services Ltd., June 2006

Testing Written Very Small

  By Tom Lecklider, Senior Technical Editor, September 2006

Taking a Signal to Bits

  By Tom Lecklider, Senior Technical Editor, January 2007

Testing Challenges of a Multicore Microprocessor

  By Louis Bushard, Ph.D., IBM; Nathan Chelstrom, Intrinsity; Steven Ferguson, IBM; and Brion Keller, Cadence Design Systems, February 2007

Is PXI Express Overkill For Boundary Scan?

  By Heiko Ehrenberg, GOEPEL Electronics, July 2007

Advances in Test Program Automation

  By Christian Bonnin, Atmel, July 2007

Reducing Logic Device Test Costs

  By Sergio Perez, FormFactor, July 2007

Applying Kelvin Measurements To PMIC Testing on ATE

  By Kent Luehman, Verigy, November 2007

Making RF-to-Baseband Noise Figure Measurements

  By Joe Kelly, Ph.D., Craig Kanetake, and Vivek Verma, Verigy USA, January 2008

Overcoming the Legacy Equipment Replacement Blues

  By Tom Lecklider, Senior Technical Editor, August 2008

Satellite Testing Demands RF Link Emulation

  By Michael Cagney, dBm, October 2008

Digital Is a State of Mind

  By Tom Lecklider, Senior Technical Editor, November 2008

Solid-State Switching in Automated Test

  By Jaideep Jhangiani, National Instruments, November 2008

February Products

  By Evaluation Engineering, February 2012

January Products

  By Evaluation Engineering, February 2012

Agilent Debuts High-Power Modules for N6700

  By Rick Nelson, Executive Editor, January 2012

Powering Test

  By Tom Lecklider, Senior Technical Editor, February 2012

Addressing Interposer and TSV Quality Challenges

  By Rick Nelson, Executive Editor, February 2012

Trends for Microcontroller Device Testing

  By Jeremy Campbell, Teradyne, January 2012

Editorial: Celebrating 50 Years of Innovation

  By Rick Nelson, Executive Editor, January 2012

Tracing Oscilloscope Coverage

  By Tom Lecklider, Senior Technical Editor, January 2012

NI targets power-amplifier test with PXI

  By Rick Nelson, editor, October 2011

Measuring SNR, SINAD, and THD Quickly

  By Carl Karandjeff, Chris Hannaford, Richard Liggiero, Solomon Max, and Steven J. Tilden, LTX-Credence, September 2011

Exploring VXI 4.0

  By Tom Sarfi, VTI Instruments; Charles Greenberg, EADS North America Test and Services; and Fred Bloennigen, Bustec, August 2011

Embedded Test Takes Many Forms

  By Tom Lecklider, Senior Technical Editor, August 2011

Runtime-Defined Instruments Tackle Modern Bus Designs

  By Peter Hansen, Teradyne, August 2011

Reducing the Cost of Test

  By Tom Lecklider, Senior Technical Editor, June 2011

A View of Undersampling

  By Hideo Okawara, Verigy Japan , May 2011

PXI Matures

  By Tom Lecklider, Senior Technical Editor, March 2011

AXIe Committee Proposes Exciting Projects for 2011

  By Bob Helsel, Executive Director of the AXIe Consortium; and Greg Hill, Editor of the AXIe 1.0 Specifications and R&D Engineer at Agilent Technologies, March 2011

One Show for All

  By Paul Milo, February 2011

DMM Improvement Takes Many Forms

  By Tom Lecklider, Senior Technical Editor, January 2011

Scalable Common Core for Automated Test Systems

  By Jon N. Semancik, VTI Instruments , January 2011

Exploring Concurrent Test Efficiency

  By Randy Kramer, Teradyne, June 2010

Test Methodology Using PXI and High-Speed Digital I/O

  By Rick Garza, G Systems, June 2010

Powering Development and Test

  By Tom Lecklider, Senior Technical Editor , May 2010

The Role of ATE in the Semiconductor Ecosystem

  By John Morris and Roy Chorev, Teradyne Semiconductor Test Division, March 2010

Baseband Module Reduces Multisite Test Costs

  By Keith Schaub, Advantest America, October 2009

DMM Is an Understatement

  By Tom Lecklider, Senior Technical Editor, August 2009

Resolving Test Challenges for High-Speed Interfaces

  By Paul F. Scrivens, Johnstech, July 2009

Switches Get No Respect

  By Tom Lecklider, Senior Technical Editor, May 2009

What Is Concurrent Test?

  By John Yost, Teradyne, April 2009

With Digitizers, The Little Bits Count

  By Tom Lecklider, Senior Technical Editor, March 2009

Integrated DMM-Switch Systems Optimize Performance

  By Tom Lecklider, Senior Technical Editor, February 2009

LXI Class A Applications

  By Tom Sarfi, VXI Technology, February 2009

To Help You Stay Informed

  By Evaluation Engineering, January 2009

Redefining Memory Test

  By Scott West, Verigy, January 2009

It's the Economy

  By Evaluation Engineering, December 2008

Navigating the Outsourcing Options

  By Keith Lee, Advantest America, November 2008

Fault Injection for Non-Boundary Scan Devices

  By Vaheh Satourian, Artaflex, October 2008

Tackling Next-Generation RF SOC Test

  By Ron Burke, Teradyne, October 2008

Using ATE for Efficient DigRF Interface Testing

  By Richard Lathrop, Verigy, September 2008

Maximizing Throughput and Accuracy

  By Jerry Janesch, Keithley Instruments, July 2008

Improving Instrumentation With User-Programmable FPGAs

  By Luke Schreier, National Instruments, July 2008

Expanding the Use of Synthetic Instruments

  By Peter Hansen and Carl Heide, Teradyne, April 2008

Taking Control of the Integration Factor

  By Mahendra Muli, Shreyas C. Nagaraj, and Alicia Alvin, dSPACE, March 2008

WLBI and Test Churn Out KGD

  By Tom Lecklider, Senior Technical Editor, February 2008

A Methodology to Speed DFT Signoff

  By Tom Jackson, Cadence Design Systems, February 2008

Reducing EVM Test Time And Identifying Failure Mechanisms

  By Keith Schaub, Advantest America, January 2008

Driving Test Cost Reduction For Next-Generation RF Devices

  By Ken Harvey, Teradyne, December 2007

Next-Generation RF Device Test Performance Challenges

  By Ken Harvey, Teradyne, November 2007

Cabled PCI Express For Measurement Applications

  By Murali Ravindran, National Instruments, October 2007

Next-Generation RF Devices Impact Test

  By Ken Harvey, Teradyne, October 2007

Tiny Switches With Big Features

  By Tom Lecklider, Senior Technical Editor, September 2007

Common Core ATE for Functional Testing

  By Andrew Kahn, G Systems, August 2007

Keeping Cool

  By Tom Lecklider, Senior Technical Editor, August 2007

Manager's Forum: The Magic of Corporate Strength From Within

  By Rick Carmichael, Nextest Systems, August 2007

Rationalizing Test-System Power Requirements

  By Robert R. Close, Teal Electronics, April 2007

Test Challenges for Transceivers

  By Max Seminario, Credence Systems, March 2007

EE Readers Select 2006's Best Products

  By EE Readers Select 2006's Best Products, January 2007

Synthetic Means More Than Nylon

  By Tom Lecklider, Senior Technical Editor, December 2006

Testing Low-Pass Filters With Digital Pins

  By Steve Holder, Nextest Systems, and Dan Bullard, Maxim Integrated Products, November 2006

The Art of Measuring Low Resistance

  By Tee Sheffer and Paul Lantz, Signametrics, November 2006

Evolutionary Changes for RF Device Testing

  By Keith Schaub and Anthony Lum, Advantest America, October 2006

Using Timing Constraints For Generating At-Speed Test Patterns

  By Bruce Swanson and Dhiraj Goswami, Mentor Graphics, October 2006

The Selection and Economics Of Wireless Test Fixtures

  By Michael Smith, Teradyne Assembly Test Division, and Neil Adams, Circuit, September 2006

Digitally Controlled Power Supplies

  By Tom Lecklider, Senior Technical Editor, August 2006

Integrating Boundary Scan With Various ATE

  By Heiko Ehrenberg, GOEPEL Electronics, July 2006

Multisite Test Strategy For SIP Mobile Technologies

  By Jim McEleney and Randy Kramer, Teradyne, July 2006

Keeping It Clean

  By Robert R. Close, Teal Electronics, May 2006

Taking Advantage of Scan For Yield Improvement

  By Ron Press, Mentor Graphics, March 2006

Addressing the Flash Memory Challenge

  By Gary Fleeman, Advantest America, March 2006

The Finer Points of Test

  By Gary St. Onge, Everett Charles Technologies, January 2006

Readers Honor Seven Products As Best of 2005

  By Evaluation Engineering, January 2006

Save Money by Buying More Equipment

  By Norton W. Alderson, Universal Switching, November 2005

Testability Beyond JTAG

  By Louis Y. Ungar, A.T.E. Solutions, September 2005

Testing Mobile Memories

  By Kurt Gusinow, Agilent Technologies, September 2005

ATE Implementations for Multisite Device Test

  By Randy Kramer and Dan Proskauer, Teradyne, July 2005

Test Pattern Compression Saves Time and Bits

  By Tom Lecklider, Senior Technical Editor, July 2005

Delivering Known Quality Die

  By Peter M. O?????Neill and Tom Vana, Agilent Technologies, April 2005

Testing Techniques to Improve Relay Reliability

  By Phil Roettjer, Relay Testing Services, April 2005

ATMLA New Standard for ATE

  By Ron Harrison, National Instruments, March 2005

Yield: The Key to Nanometer Profits

  By Tom Lecklider, Senior Technical Editor, March 2005

New Test Approaches for ZIF Transceiver Devices

  By John Lukez, Credence Systems, January 2005