DESIGN FOR TEST

Making Test Lean Again

by John VanNewkirk, CheckSum

Circuit board test, like any step in the PCB assembly process, benefits from lean manufacturing practices that continually improve process steps. If lean manufacturing principles were applied to circuit board test, what would a lean test strategy and test platform look like? A viable option is an efficient implementation of lean board test that uses an open platform board test (OPBT) architecture.

The End of the In-Circuit Era

The need to get more done with fewer resources has driven important strategic shifts through the history of circuit board test. In the late 1970s and early 1980s, increasingly complex boards populated with early microprocessors began outstripping the capabilities of digital functional testers. By the mid-1980s, in-circuit testers with their lower capital cost, much simpler programming, and fault coverage aligned to common manufacturing faults had supplanted digital functional testers in the PCB assembly process.

Basic Architecture of an Open Platform Structural Tester

As component and board technology advanced, so did in-circuit tester capability—and complexity. By the mid-1990s, in-circuit test (ICT) platforms were chockablock with capabilities like backdrive digital vector test and variants such as combinational test that eventually made in-circuit testers as expensive, complicated, and costly to deploy as their digital functional predecessors. Once again, developing and debugging test programs took weeks, and maintenance and support costs grew as well.

Today, these capable but expensive traditional ICT platforms make up the majority of the worldwide in-circuit installed base. Regardless of the complexity or cost, most test engineers consider ICT a solved problem and have turned their attention elsewhere.

But current economic and technical realities are bringing the era of traditional in-circuit testers to an end as surely as the digital functional testers they once replaced. Here’s why:

Loss of Electrical Access to Circuit Nodes
Increasingly complex components are packed more densely into shrinking board dimensions. The price of miniaturization is ever decreasing electrical accessibility by ICT bed-of-nails test fixtures, leading to reduced fault coverage.

The Shift in the Manufacturing Fault Spectrum
Even as board technology has grown in complexity, automated assembly and improved component quality have increased manufacturing yields and changed the traditional proportions of component and assembly process defects. For example, while improved device quality has made digital defects almost nonexistent, relatively more mechanical and solder-quality defects now occur.

Insufficient Resources
Traditional ICT platforms in use today were purchased early this decade during a time of plenty: plenty of money and plenty of skilled test engineers to deal with sophisticated and complex test systems. But as factories have consolidated or closed, skilled programming talent and the budgets to support it are increasingly scarce. Almost all of the advanced capabilities of traditional in-circuit testers remain idle because very few test engineering groups have the personnel bandwidth to take advantage of them.

The upshot is decreasing test coverage delivered by traditional ICT platforms optimized for a fault spectrum that no longer is the norm. What’s needed is a paradigm shift like the one that occurred almost 30 years ago, driven by the same need to get more done with fewer resources. What should this new test strategy and the testers that support it look like?

Lean Testing for Lean Manufacturing

Under relentless pressure to reduce costs, OEMs and their electronics manufacturing services (EMS) providers are adopting lean manufacturing techniques pioneered by the Toyota Production System. At its heart, lean manufacturing simply is scrutinizing each step in the process to modify or even eliminate procedures and equipment that do not add value. The board test step relies on increasingly inefficient traditional ICT systems and is an obvious candidate for reexamination from the lean perspective.

We can define lean ICT as follows:
• Test acts as a monitor of the quality of the upstream manufacturing process as measured by first-pass yield.
• Test must identify and diagnose defects to ensure they do not escape to the next process stage.
• Measurable value may be added to the board while it is at the test stage.

Resource constraints demand that these objectives be accomplished in the least possible time at the least possible cost.

Meeting Lean Test Objectives

So, what test strategy and test technology meet these lean-test objectives?

In-Circuit Test
Even with loss of some access, most circuit boards still possess sufficient accessibility that ICT remains the most time- and cost-efficient method for monitoring process quality and diagnosing manufacturing faults.

Boundary Scan
The best antidote for loss of access is boundary scan, standardized as IEEE 1149.1. Boundary scan technology can perform virtual interconnect (shorts and open) tests as well as identify whether the correct devices are present. Recent releases of 1149 deal with analog devices (1149.4) and AC-coupled interconnects (1149.6), further increasing potential coverage.

Structural Functional Test
Structural functional test (SFT) comprises a broad category of transfer function testing; that is, stimulating inputs of a circuit and measuring outputs for expected response such as voltage, current, frequency, or period to identify circuit or device operational defects that cannot be detected by ICT or boundary scan. It contrasts with other functional test techniques aimed at checking specified operating parameters or overall board function like hot-bed or quick-verify test. The goal is to identify defects in components or circuits that cannot be identified by ICT or boundary scan techniques.

Going forward, SFT capability will play an important enabling role as BIST for subsections or entire circuit assemblies becomes more widely adopted. It can be challenging to implement because every circuit has a different set of analog or mixed-signal operating characteristics to be measured, often requiring a customized and expensive solution for every circuit board type.

SFT usually requires adding specialized test instrumentation or one or more COTS instruments as well as signal routing and switching to the base test system. In addition to implementation challenges, almost all SFT measurements of circuits operating at more than a few kilohertz cannot be made while the board under test is physically connected to the ICT bed-of-nails fixture, resulting in the requirement for dual-level test fixturing (see dual-leveling fixturing sidebar).

 

Manufacturing Test
Manufacturing test is an attractive point in the process to add product value by programming and verifying programmable logic devices such as microcontrollers and flash memories after they have been attached to the circuit board. On-board part programming at ICT is the essence of lean manufacturing because it simplifies the overall manufacturing process and reduces programmable device inventory.

Using a Single Platform for Lean Testing

An ideal lean test strategy consists of a single process step with high throughput and low cost. This suggests that all four technologies—ICT, boundary scan, SFT, and on-board programming—should be performed on a single platform to eliminate multiple steps, multiple systems, and unnecessary board handling.

Single-platform testing dates back to the original intent of combinational testers introduced in the mid-1980s. As those testers and their traditional ICT successors have amply proven, the major obstacle to single-platform testing is the tester itself.

Suppliers of traditional ICT have long promoted openness, claiming that features such as Unix-based test executive software or VXI form-factor test cages simplify the test job implementation task. In reality, even the most open of these systems include proprietary barriers that hinder straightforward hardware add-ons and software modifications.

Not surprisingly, the open solution for boundary scan, SFT, or on-board part programming usually is found only in the vendor’s proprietary product catalog and price list. Tightly integrated hardware and software make it time-consuming and expensive to add custom or third-party software and hardware not sourced by the test system manufacturer. The examples abound:
• Test executive operating systems are tailored specifically to the tester’s hardware architecture, lacking hooks to ease integration of third-party and user-developed software.
• Multiplexed switching architectures found in many traditional ICT systems are not easily adaptable to functional test signal-routing requirements.
• Proprietary card-cage designs and console space limitations are frequently inhospitable to add-in instrumentation and power supplies.
• No integrated test fixturing system is amenable to the conflicting requirements of ICT and functional testing.

Learning From Semiconductor Test

Semiconductor test provides a useful example of how single-platform board test may be implemented successfully in a lean manufacturing process. In the last few years, ever-growing chip complexity has led to increasingly expensive functional testers with unacceptably long test-program development times. Just as ICT replaced full-scale circuit board functional test, device structural test to ensure the IC is manufactured correctly, has emerged as a cost-effective production test technology.

However, unlike the closed architectures of traditional ICT platforms, designers of popular semiconductor testers took an open, multiple-vendor-friendly approach to single-platform test architectures. This translates directly into the key qualities of an OPBT:
• A reconfigurable system hardware, software, and fixturing architecture that adapts readily to multiple and frequently changing test strategies.
• The capability to add or remove test subsystem, instrumentation, switching, power supplies, and test fixturing quickly and inexpensively.
• The capability to leverage the growing number of hardware and software test solutions available from multiple vendors.

Defining the OPBT

ICT capability remains at the heart of the OPBT and must provide high fault coverage for complex boards. In keeping with the lean-test philosophy, OPBT architecture must be flexible enough to easily integrate a wide variety of boundary scan and SFT implementations supplied either by the platform vendor or third parties as well as facilities for on-board part programming. Working against this flexibility is the requirement that the OPBT be architecturally simple and comparatively inexpensive to deal with today’s smaller capital budgets and scarcer test engineering resources.

In addition to these basic architectural requirements, making OPBT a practical tool in today’s resource-constrained test engineering environments also requires straightforward reconfigurability. A truly open platform must incorporate practical tools and subsystems that provide maximum test strategy flexibility with minimum implementation complexity including:
• The test platform allows for straightforward expansion of ICT channels to accommodate boards exceeding 5,000 circuit nodes and multiboard panels.
• The platform provides a test fixture interface and probe actuation system that accommodate physically large boards and panels.
• The platform’s core operating system is a de facto industry standard such as Windows XP, which is widely understood and can be integrated easily into factory networks.
• The platform offers a logical and straightforward test executive, including easy-to-use hooks to integrate other vendor’s or user-developed software to leverage the open platform’s existing development, verification, and production software tools.
• Optional signal and power switching modules are readily available from the platform vendor or third parties. It should be simple to route signal and power cabling in the test console and then to connect to the test fixture via an accommodating interface.
• The system console has sufficient and accessible physical space to house additional power supplies, instruments, circuit boards, and modules.
• The test fixture receiver includes spare connection points for power and signal routing to the test fixture. Sufficient connection points capable of handling higher voltages and currents for power routing are readily available at the fixture interface.
• The interface should be a popular industry standard whose parts are readily available to test fixture fabrication services.
• The platform includes a flexible dual-level actuation test fixturing system: one level for every nail ICT and a second level for board power-on boundary scan and functional test as well as on-board part programming.

OPBT

The OPBT strips away unneeded overhead and proprietary obstacles that hinder testing complex boards at low cost. A flexible and open hardware and software architecture allows the test engineer to choose the optimum mix of ICT, boundary scan, SFT, and on-board part programming tailored for each board type (see example OPBT sequence sidebar).

 

Test engineers are already naturally biased to favor lean board test: testing only what needs to be tested while eliminating redundant tests and tests for faults that never occur. OPBT provides adaptable hardware, software, and fixturing tools that make achieving the lean test goal simpler and faster than with traditional ICT systems.

Just as in-circuit replaced digital functional test on so many factory floors 30 years ago, OPBT is the logical replacement for traditional ICT. In these economically trying times, it all comes down to accomplishing more with less.

About the Author

John VanNewkirk is president and CEO of CheckSum. Before he entered the test industry, Mr. VanNewkirk led a successful turnaround of a steel service center in southern China and was a management consultant with Bain & Company in Hong Kong and San Francisco. He holds a B.S. from Brown University and an M.B.A. from Harvard University. CheckSum, P.O. Box 3279, Arlington, WA 98223, 306-435-5510, e-mail: john.vannewkirk@checksum.com